IP Library Granted Patent US 5,593,909
Granted Patent Utility
US 5,593,909 · App. 08/467,715

Method for fabricating a MOS transistor having an offset resistance

Inventors: Min-Koo Han, Byung-Hyuk Min
Patented Case View Patent ↗
Granted: Jan 14, 1997 Filed: Jun 6, 1995
Inventors
Min-Koo Han
Byung-Hyuk Min
Assignee (at issue)
SAMSUNG DISPLAY CO., LTD.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,593,909
App. No.
08/467,715
Filed
1995-06-06
Granted
1997-01-14
Kind
A