Granted Patent
Utility
US 5,594,763 · App. 08/467,645
Fast synchronizing digital phase-locked loop for recovering clock information from encoded data
Inventor:
Hanumanthrao Nimishakavi
Patented Case
View Patent ↗
Granted: Jan 14, 1997
Filed: Jun 6, 1995
Inventor
Hanumanthrao Nimishakavi
Assignee (at issue)
Cirrus Logic Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.