IP Library › Granted Patent US 5,608,741
Granted Patent Utility
US 5,608,741 · App. 08/156,427

Fast parity generator using complement pass-transistor logic

Inventors: Sudarshan Kumar, Shyue L. Kuo, Chung Yin Yip
Patented Case View Patent ↗
Granted: Mar 4, 1997 Filed: Nov 23, 1993
Inventors
Sudarshan Kumar
Shyue L. Kuo
Chung Yin Yip
Assignee (at issue)
Intel Corporation

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,608,741
App. No.
08/156,427
Filed
1993-11-23
Granted
1997-03-04
Kind
A