IP Library Granted Patent US 5,610,079
Granted Patent Utility
US 5,610,079 · App. 08/491,669

Self-biased moat for parasitic current suppression in integrated circuits

Inventors: Gerard G. Skebe, Steven M. Galecki
Patented Case View Patent ↗
Granted: Mar 11, 1997 Filed: Jun 19, 1995
Inventors
Gerard G. Skebe
Steven M. Galecki
Assignee (at issue)
Reliance Electric Industrial Company

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,610,079
App. No.
08/491,669
Filed
1995-06-19
Granted
1997-03-11
Kind
A