Granted Patent
Utility
US 5,632,025 · App. 08/696,788
Method for preventing multi-level cache system deadlock in a multi-processor system
Inventors:
Joseph P. Bratt, John Brennan, Peter Hsu, William A. Huffman, Joseph T. Scanlon, Steve J. Ciavaglia
Patented Case
View Patent ↗
Granted: May 20, 1997
Filed: Aug 14, 1996
Inventors
Joseph P. Bratt
John Brennan
Peter Hsu
William A. Huffman
Joseph T. Scanlon
Steve J. Ciavaglia
Assignee (at issue)
Silicon Graphics, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.