IP Library Granted Patent US 5,641,697
Granted Patent Utility
US 5,641,697 · App. 08/644,447

Method of making a MOS device with an input protection circuit LP

Inventor: Eiichi Iwanami
Patented Case View Patent ↗
Granted: Jun 24, 1997 Filed: May 13, 1996
Inventor
Eiichi Iwanami
Assignee (at issue)
Nippon Steel Semiconductor Corporation

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Quick Facts
Patent No.
US 5,641,697
App. No.
08/644,447
Filed
1996-05-13
Granted
1997-06-24
Kind
A