IP Library Granted Patent US 5,648,909
Granted Patent Utility
US 5,648,909 · App. 08/490,439

Static timing verification in the presence of logically false paths

Inventors: Larry L. Biro, Joel Grodstein, Jeng-Wei Pan, Nicholas Lee Rethman
Patented Case View Patent ↗
Granted: Jul 15, 1997 Filed: Jun 12, 1995
Inventors
Larry L. Biro
Joel Grodstein
Jeng-Wei Pan
Nicholas Lee Rethman
Assignee (at issue)
Digital Equipment Corporation

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,648,909
App. No.
08/490,439
Filed
1995-06-12
Granted
1997-07-15
Kind
A