IP Library › Granted Patent US 5,649,154
Granted Patent Utility
US 5,649,154 · App. 08/547,047

Cache memory system having secondary cache integrated with primary cache for use with VLSI circuits

Inventors: Rajendra Kumar, Paul G. Emerson
Patented Case View Patent ↗
Granted: Jul 15, 1997 Filed: Oct 23, 1995
Inventors
Rajendra Kumar
Paul G. Emerson
Assignee (at issue)
Hewlett-Packard Company, L.P.

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Quick Facts
Patent No.
US 5,649,154
App. No.
08/547,047
Filed
1995-10-23
Granted
1997-07-15
Kind
A