Granted Patent
Utility
US 5,652,846 · App. 08/497,820
Bus deadlock prevention circuit for use with second level cache controller
Inventor:
Chi Kim Sides
Patented Case
View Patent ↗
Granted: Jul 29, 1997
Filed: Jul 3, 1995
Inventor
Chi Kim Sides
Assignee (at issue)
Compaq Computer Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.