IP Library Granted Patent US 5,657,240
Granted Patent Utility
US 5,657,240 · App. 08/431,599

Testing and removal of redundancies in VLSI circuits with non-boolean primitives

Inventors: Srimat Chakradhar, Steven G. Rothweiler, Vishwani D. Agrawal
Patented Case View Patent ↗
Granted: Aug 12, 1997 Filed: May 1, 1995
Inventors
Srimat Chakradhar
Steven G. Rothweiler
Vishwani D. Agrawal
Assignee (at issue)
NEC USA, Inc.

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Quick Facts
Patent No.
US 5,657,240
App. No.
08/431,599
Filed
1995-05-01
Granted
1997-08-12
Kind
A