IP Library › Granted Patent US 5,659,502
Granted Patent Utility
US 5,659,502 · App. 08/665,862

Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices

Inventors: Mauro Sali, Corrado Villa, Marcello Carrera
Patented Case View Patent ↗
Granted: Aug 19, 1997 Filed: Jun 19, 1996
Inventors
Mauro Sali
Corrado Villa
Marcello Carrera
Assignee (at issue)
SGS-Thomson Microelectronics S.A.

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Quick Facts
Patent No.
US 5,659,502
App. No.
08/665,862
Filed
1996-06-19
Granted
1997-08-19
Kind
A