IP Library Granted Patent US 5,668,967
Granted Patent Utility
US 5,668,967 · App. 08/303,853

Apparatus and methods for reducing numbers of read-modify-write cycles to a memory, and for improving DMA efficiency

Inventors: Stephen W. Olson, James B. MacDonald, Edward D. Mann, James W. Petersen, Jr.
Patented Case View Patent ↗
Granted: Sep 16, 1997 Filed: Sep 9, 1994
Inventors
Stephen W. Olson
James B. MacDonald
Edward D. Mann
James W. Petersen, Jr.
Assignee (at issue)
Wang Laboratories, Inc.

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Quick Facts
Patent No.
US 5,668,967
App. No.
08/303,853
Filed
1994-09-09
Granted
1997-09-16
Kind
A