Granted Patent
Utility
US 5,675,281 · App. 08/652,933
Method and circuit for preventing forward bias of a parasitic diode in an integrated circuit
Inventor:
Thomas R. DeShazo, Jr.
Patented Case
View Patent ↗
Granted: Oct 7, 1997
Filed: May 24, 1996
Inventor
Thomas R. DeShazo, Jr.
Assignee (at issue)
HARRIS CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.