Granted Patent
Utility
US 5,701,270 · App. 08/595,236
Single chip controller-memory device with interbank cell replacement capability and a memory architecture and methods suitble for implementing the same
Inventor:
G. R. Mohan Rao
Patented Case
View Patent ↗
Granted: Dec 23, 1997
Filed: Feb 1, 1996
Inventor
G. R. Mohan Rao
Assignee (at issue)
Cirrus Logic Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.