Method of making PMOSFETs having indium or gallium doped buried channels and n+ polysilicon gates and CMOS devices fabricated therefrom

Granted: Jan 20, 1998 Filed: Jun 7, 1995

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.