Granted Patent
Utility
US 5,764,078 · App. 08/486,178
Family of multiple segmented programmable logic blocks interconnected by a high speed centralized switch matrix
Inventors:
Om P. Agrawal, Jerry D. Moench
Patented Case
View Patent ↗
Granted: Jun 9, 1998
Filed: Jun 6, 1995
Inventors
Om P. Agrawal
Jerry D. Moench
Assignee (at issue)
Advanced Micro Devices, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.