Granted Patent
Utility
US 5,765,023 · App. 08/536,732
DMA controller having multiple channels and buffer pool having plurality of buffers accessible to each channel for buffering data transferred to and from host computer
Inventors:
Geary L. Leger, Bhoopal R. Benjaram, Peter R. Carpenter, Gary L. Schaps, John A. Wishneusky
Patented Case
View Patent ↗
Granted: Jun 9, 1998
Filed: Sep 29, 1995
Inventors
Geary L. Leger
Bhoopal R. Benjaram
Peter R. Carpenter
Gary L. Schaps
John A. Wishneusky
Assignee (at issue)
Cirrus Logic Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.