IP Library Granted Patent US 5,765,023
Granted Patent Utility
US 5,765,023 · App. 08/536,732

DMA controller having multiple channels and buffer pool having plurality of buffers accessible to each channel for buffering data transferred to and from host computer

Inventors: Geary L. Leger, Bhoopal R. Benjaram, Peter R. Carpenter, Gary L. Schaps, John A. Wishneusky
Patented Case View Patent ↗
Granted: Jun 9, 1998 Filed: Sep 29, 1995
Inventors
Geary L. Leger
Bhoopal R. Benjaram
Peter R. Carpenter
Gary L. Schaps
John A. Wishneusky
Assignee (at issue)
Cirrus Logic Inc.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,765,023
App. No.
08/536,732
Filed
1995-09-29
Granted
1998-06-09
Kind
A