IP Library Granted Patent US 5,777,347
Granted Patent Utility
US 5,777,347 · App. 08/896,895

Vertical CMOS digital multi-valued restoring logic device

Inventor: Dirk J. Bartelink
Patented Case View Patent ↗
Granted: Jul 7, 1998 Filed: Jul 18, 1997
Inventor
Dirk J. Bartelink
Assignee (at issue)
Hewlett-Packard Company, L.P.

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Quick Facts
Patent No.
US 5,777,347
App. No.
08/896,895
Filed
1997-07-18
Granted
1998-07-07
Kind
A