IP Library Granted Patent US 5,801,421
Granted Patent Utility
US 5,801,421 · App. 08/850,278

Staggered contact placement on CMOS chip

Inventors: Joseph C. Sher, Manny K. F. Ma, Stephen L. Casper
Patented Case View Patent ↗
Granted: Sep 1, 1998 Filed: May 5, 1997
Inventors
Joseph C. Sher
Manny K. F. Ma
Stephen L. Casper
Assignee (at issue)
Micron Technology, Inc.

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Quick Facts
Patent No.
US 5,801,421
App. No.
08/850,278
Filed
1997-05-05
Granted
1998-09-01
Kind
A