Granted Patent
Utility
US 5,805,909 · App. 08/510,808
Microprocessors or microcontroller utilizing FLL clock having a reduced power state
Inventor:
Horst Diewald
Patented Case
View Patent ↗
Granted: Sep 8, 1998
Filed: Aug 3, 1995
Inventor
Horst Diewald
Assignee (at issue)
Texas Instruments Incorporated
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.