Granted Patent
Utility
US 5,815,430 · App. 08/691,132
Circuit and method for reducing compensation of a ferroelectric capacitor by multiple pulsing of the plate line following a write operation
Inventors:
Donald J. Verhaeghe, Steven D. Traynor
Patented Case
View Patent ↗
Granted: Sep 29, 1998
Filed: Aug 1, 1996
Inventors
Donald J. Verhaeghe
Steven D. Traynor
Assignee (at issue)
RAMTRON INTERNATIONAL CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.