Granted Patent
Utility
US 5,828,624 · App. 08/772,497
Decoder circuit and method for disabling a number of columns or rows in a memory
Inventors:
William G. Baker, Andrew L. Hawkins, Jeffery Scott Hunt
Patented Case
View Patent ↗
Granted: Oct 27, 1998
Filed: Dec 23, 1996
Inventors
William G. Baker
Andrew L. Hawkins
Jeffery Scott Hunt
Assignee (at issue)
Cypress Semiconductor Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.