Granted Patent
Utility
US 5,856,940 · App. 08/911,737
Low latency DRAM cell and method therefor
Inventor:
G. R. Mohan Rao
Patented Case
View Patent ↗
Granted: Jan 5, 1999
Filed: Aug 15, 1997
Inventor
G. R. Mohan Rao
Assignee (at issue)
Silicon Aquarius, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.