Granted Patent
Utility
US 5,864,510 · App. 08/908,710
Semiconductor memory device having a bit compressed test mode and a check mode selecting section
Inventor:
Yuji Nakaoka
Patented Case
View Patent ↗
Granted: Jan 26, 1999
Filed: Aug 8, 1997
Inventor
Yuji Nakaoka
Assignee (at issue)
NEC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.