Granted Patent
Utility
US 5,872,386 · App. 08/680,982
Wafer layout of semiconductor device
Inventors:
Keiji Sato, Yutaka Saito
Patented Case
View Patent ↗
Granted: Feb 16, 1999
Filed: Jul 16, 1996
Inventors
Keiji Sato
Yutaka Saito
Assignee (at issue)
SII R&D Center Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.