Granted Patent
Utility
US 5,909,134 · App. 08/960,428
Clock generator for generating complementary clock signals with minimal time differences
Inventors:
Jang Sub Sohn, Yong-Weon Jeon
Patented Case
View Patent ↗
Granted: Jun 1, 1999
Filed: Oct 29, 1997
Inventors
Jang Sub Sohn
Yong-Weon Jeon
Assignee (at issue)
LG Semicon Co., Ltd.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.