Semiconductor processing method of providing electrical isolation between adjacent semiconductor diffusion regions of different field effect transistors and integrated circuitry having adjacent electrically isolated field effect transistors

Granted: Jul 20, 1999 Filed: Jun 18, 1998

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.