Granted Patent
Utility
US 5,937,174 · App. 08/673,654
Scalable hierarchial memory structure for high data bandwidth raid applications
Inventor:
Bret S. Weber
Patented Case
View Patent ↗
Granted: Aug 10, 1999
Filed: Jun 28, 1996
Inventor
Bret S. Weber
Assignee (at issue)
LSI Logic Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.