IP Library › Granted Patent US 5,937,288
Granted Patent Utility
US 5,937,288 · App. 08/884,860

CMOS integrated circuits with reduced substrate defects

Inventors: Johann Alsmeier, Klaus Wangemann
Patented Case View Patent ↗
Granted: Aug 10, 1999 Filed: Jun 30, 1997
Inventors
Johann Alsmeier
Klaus Wangemann
Assignee (at issue)
Siemens Aktiengesellschaft

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Quick Facts
Patent No.
US 5,937,288
App. No.
08/884,860
Filed
1997-06-30
Granted
1999-08-10
Kind
A