IP Library Granted Patent US 5,953,264
Granted Patent Utility
US 5,953,264 · App. 08/937,006

Redundant memory cell selecting circuit having fuses coupled to memory cell group address and memory cell block address

Inventors: Hiroshige Hirano, Hisakazu Kotani, Naomi Miyake
Patented Case View Patent ↗
Granted: Sep 14, 1999 Filed: Sep 24, 1997
Inventors
Hiroshige Hirano
Hisakazu Kotani
Naomi Miyake
Assignee (at issue)
SUMITOMO ELECTRIC INDUSTRIES, LTD.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,953,264
App. No.
08/937,006
Filed
1997-09-24
Granted
1999-09-14
Kind
A