IP Library Granted Patent US 5,953,386
Granted Patent Utility
US 5,953,386 · App. 08/667,150

High speed clock recovery circuit using complimentary dividers

Inventor: Michael B. Anderson
Patented Case View Patent ↗
Granted: Sep 14, 1999 Filed: Jun 20, 1996
Inventor
Michael B. Anderson
Assignee (at issue)
LSI Logic Corporation

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Quick Facts
Patent No.
US 5,953,386
App. No.
08/667,150
Filed
1996-06-20
Granted
1999-09-14
Kind
A