IP Library Granted Patent US 5,953,739
Granted Patent Utility
US 5,953,739 · App. 09/247,994

Synchronous DRAM cache using write signal to determine single or burst write

Inventors: Paul S. Zagar, Mirmajid Seyyedy
Patented Case View Patent ↗
Granted: Sep 14, 1999 Filed: Feb 10, 1999
Inventors
Paul S. Zagar
Mirmajid Seyyedy
Assignee (at issue)
Micron Technology, Inc.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 5,953,739
App. No.
09/247,994
Filed
1999-02-10
Granted
1999-09-14
Kind
A