IP Library Granted Patent US 5,960,270
Granted Patent Utility
US 5,960,270 · App. 08/907,990

Method for forming an MOS transistor having a metallic gate electrode that is formed after the formation of self-aligned source and drain regions

Inventors: Veena Misra, Suresh Venkatesan, Christopher C. Hobbs, Brad Smith, Jeffrey S. Cope, Earnest B. Wilson
Patented Case View Patent ↗
Granted: Sep 28, 1999 Filed: Aug 11, 1997
Inventors
Veena Misra
Suresh Venkatesan
Christopher C. Hobbs
Brad Smith
Jeffrey S. Cope
Earnest B. Wilson
Assignee (at issue)
Motorola, Inc.

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Quick Facts
Patent No.
US 5,960,270
App. No.
08/907,990
Filed
1997-08-11
Granted
1999-09-28
Kind
A