Granted Patent
Utility
US 5,974,247 · App. 08/918,102
Apparatus and method of LSI timing degradation simulation
Inventor:
Hirokazu Yonezawa
Patented Case
View Patent ↗
Granted: Oct 26, 1999
Filed: Aug 27, 1997
Inventor
Hirokazu Yonezawa
Assignee (at issue)
Matsushita Electronics Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.