Granted Patent
Utility
US 5,995,403 · App. 08/822,237
DRAM having memory cells each using one transfer gate and one capacitor to store plural bit data
Inventor:
Isao Naritake
Patented Case
View Patent ↗
Granted: Nov 30, 1999
Filed: Mar 20, 1997
Inventor
Isao Naritake
Assignee (at issue)
NEC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.