IP Library › Granted Patent US 6,002,567
Granted Patent Utility
US 6,002,567 · App. 08/953,184

ESD protection for high voltage level input for analog application

Inventors: ZhiYuan Zou, Hoang P. Nguyen
Patented Case View Patent ↗
Granted: Dec 14, 1999 Filed: Oct 17, 1997
Inventors
ZhiYuan Zou
Hoang P. Nguyen
Assignee (at issue)
LSI Logic Corporation

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Quick Facts
Patent No.
US 6,002,567
App. No.
08/953,184
Filed
1997-10-17
Granted
1999-12-14
Kind
A