Granted Patent
Utility
US 6,011,600 · App. 09/272,885
Transistor matrix device wherein light is shielded by gaps between n-th and n+1-th picture element electrodes by n+1-th capacitance bus line
Inventors:
Tsuyoshi Kamada, Yoji Nagase, Katsusige Asada
Patented Case
View Patent ↗
Granted: Jan 4, 2000
Filed: Mar 19, 1999
Inventors
Tsuyoshi Kamada
Yoji Nagase
Katsusige Asada
Assignee (at issue)
Fujitsu Limited
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.