Granted Patent
Utility
US 6,044,449 · App. 09/188,708
RISC microprocessor architecture implementing multiple typed register sets
Inventors:
Sanjiy Garg, Derek J. Lentz, Le Trong Nguyen, Sho Long Chen
Patented Case
View Patent ↗
Granted: Mar 28, 2000
Filed: Nov 10, 1998
Inventors
Sanjiy Garg
Derek J. Lentz
Le Trong Nguyen
Sho Long Chen
Assignee (at issue)
SEIKO EPSON CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.