Granted Patent
Utility
US 6,047,372 · App. 09/290,837
Apparatus for routing one operand to an arithmetic logic unit from a fixed register slot and another operand from any register slot
Inventors:
John S. Thayer, Brian E. Longhenry, John G. Favor, Frederick Daniel Weber
Patented Case
View Patent ↗
Granted: Apr 4, 2000
Filed: Apr 13, 1999
Inventors
John S. Thayer
Brian E. Longhenry
John G. Favor
Frederick Daniel Weber
Assignees (at issue)
Compaq Computer Corporation
Advanced Micro Devices, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.