IP Library Granted Patent US 6,072,216
Granted Patent Utility
US 6,072,216 · App. 09/071,729

Vertical DMOS field effect transistor with conformal buried layer for reduced on-resistance

Inventors: Richard K. Williams, Wayne B. Grabowski
Patented Case View Patent ↗
Granted: Jun 6, 2000 Filed: May 1, 1998
Inventors
Richard K. Williams
Wayne B. Grabowski
Assignee (at issue)
SILICONIX INCORPORATED

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Quick Facts
Patent No.
US 6,072,216
App. No.
09/071,729
Filed
1998-05-01
Granted
2000-06-06
Kind
A