Granted Patent
Utility
US 6,090,648 · App. 09/144,841
Method of making a self-aligned integrated resistor load on ultrathin silicon on sapphire
Inventors:
Ronald E. Reedy, Mark L. Burgener
Patented Case
View Patent ↗
Granted: Jul 18, 2000
Filed: Aug 31, 1998
Inventors
Ronald E. Reedy
Mark L. Burgener
Assignee (at issue)
Peregrine Semiconductor Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.