Granted Patent
Utility
US 6,094,965 · App. 09/087,764
Semiconductor calibration structures and calibration wafers for ascertaining layer alignment during processing and calibrating multiple semiconductor wafer coating systems
Inventors:
Walter Hubbard, Lisa Napolitano
Patented Case
View Patent ↗
Granted: Aug 1, 2000
Filed: May 29, 1998
Inventors
Walter Hubbard
Lisa Napolitano
Assignee (at issue)
VLSI Technology, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.