IP Library › Granted Patent US 6,131,140
Granted Patent Utility
US 6,131,140 · App. 08/577,895

Integrated cache memory with system control logic and adaptation of RAM bus to a cache pinout

Inventors: Thurman J. Rodgers, Raymond M. Leong, Peter Voss, Tek Wei
Patented Case View Patent ↗
Granted: Oct 10, 2000 Filed: Dec 22, 1995
Inventors
Thurman J. Rodgers
Raymond M. Leong
Peter Voss
Tek Wei
Assignee (at issue)
Cypress Semiconductor Corporation

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Quick Facts
Patent No.
US 6,131,140
App. No.
08/577,895
Filed
1995-12-22
Granted
2000-10-10
Kind
A