Granted Patent
Utility
US 6,137,061 · App. 08/904,526
Reduction of parasitic through hole via capacitance in multilayer printed circuit boards
Inventors:
Luis A. Aponte, Mark Benda, Joseph Peter Savicki
Patented Case
View Patent ↗
Granted: Oct 24, 2000
Filed: Aug 1, 1997
Inventors
Luis A. Aponte
Mark Benda
Joseph Peter Savicki
Assignee (at issue)
LUCENT TECHNOLOGIES INC.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.