Granted Patent
Utility
US 6,165,899 · App. 09/178,813
Method for manufacturing semiconductor devices having dual damascene structure
Inventor:
Akira Matumoto
Patented Case
View Patent ↗
Granted: Dec 26, 2000
Filed: Oct 26, 1998
Inventor
Akira Matumoto
Assignee (at issue)
NEC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.