Granted Patent
Utility
US 6,175,941 · App. 09/207,349
Error correction apparatus and associated method utilizing parellel processing
Inventors:
Alan D. Poeppelman, Mark Rutherford
Patented Case
View Patent ↗
Granted: Jan 16, 2001
Filed: Dec 8, 1998
Inventors
Alan D. Poeppelman
Mark Rutherford
Assignee (at issue)
LSI Logic Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.