Granted Patent
Utility
US 6,188,095 · App. 09/163,670
61/4 f2 DRAM cell structure with four nodes per bitline-stud and two topological wordline levels
Inventor:
Andreas Hieke
Patented Case
View Patent ↗
Granted: Feb 13, 2001
Filed: Sep 30, 1998
Inventor
Andreas Hieke
Assignee (at issue)
Siemens Aktiengesellschaft
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.