IP Library Granted Patent US 6,199,031
Granted Patent Utility
US 6,199,031 · App. 09/144,680

HDL simulation interface for testing and verifying an ASIC model

Inventors: Pierre Yves Challier, Christelle Faucon, Jean Francois Duboc
Patented Case View Patent ↗
Granted: Mar 6, 2001 Filed: Aug 31, 1998
Inventors
Pierre Yves Challier
Christelle Faucon
Jean Francois Duboc
Assignee (at issue)
VLSI Technology, Inc.

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Quick Facts
Patent No.
US 6,199,031
App. No.
09/144,680
Filed
1998-08-31
Granted
2001-03-06
Kind
A