Granted Patent
Utility
US 6,211,544 · App. 09/272,215
Memory cell layout for reduced interaction between storage nodes and transistors
Inventors:
Young Jin Park, Carl Radens, Gerhard Kunkel
Patented Case
View Patent ↗
Granted: Apr 3, 2001
Filed: Mar 18, 1999
Inventors
Young Jin Park
Carl Radens
Gerhard Kunkel
Assignees (at issue)
Infineon Technologies North America Corp.
International Business Machines Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.