Granted Patent
Utility
US 6,216,205 · App. 09/082,893
Methods of controlling memory buffers having tri-port cache arrays therein
Inventors:
Bruce Lorenz Chin, Robert J. Proebsting
Patented Case
View Patent ↗
Granted: Apr 10, 2001
Filed: May 21, 1998
Inventors
Bruce Lorenz Chin
Robert J. Proebsting
Assignee (at issue)
Integrated Device Technology, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.